1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory, particularly to a multi-level NAND cell type flash memory such as a four-level NAND cell type flash memory.
2. Description of the Related Art
A flash memory is constituted of a memory cell including a floating gate electrode and control gate electrode, and data program/erase is realized by adjustment of a charge amount in the floating gate electrode. The charge amount determines a threshold voltage of the memory cell. For example, a state in which the memory cell has a negative threshold voltage is set to a state “1”, and a state in which the memory cell has a positive threshold voltage is set to a state “0”.
In recent years, for a purpose of reducing a price per bit (bit unit price) or increasing a storage capacity of one memory chip, research and development of a multi-level flash memory have been advanced in which one memory cell stores a plurality of bit data.
Here, when one memory cell stores n (n is a natural number of 2 or more) bit data, that is, 2n values, the memory cell has 2n states (2n threshold value bands). For example, when one memory cell stores two bit data, the memory cell includes four threshold value bands.
The number of threshold value bands increases in proportion to an increase of the number of bits stored in one memory cell. On the other hand, an inner power voltage of the flash memory tends to drop. That is, as the number of bits stored in one memory cell increases, the number of threshold value bands increases, and the width of one threshold value band narrows. Therefore, in the multi-level flash memory, it is important to control the threshold voltage of the memory cell with good precision and enhance reliability.
As a technique for controlling the threshold voltage of the memory cell with the high precision, for example, a method of stepping up a write voltage at a constant ratio in accordance with the number of writes (step-up method) is known (refer to, for example, Fast and Accurate Programming Method for Multi-level NAND EEPROMs, pp. 129-130, Digest of 1995 Symposium on VLSI Technology).
This method will briefly be described. The step-up of the write voltage is realized by changing sizes of a plurality of continuous write pulses. For example, the size of the write pulse gradually increases at a ratio of 0.2 V/10 μsec. Every time the write pulses are applied to a plurality of memory cells as objects of a write operation, the threshold voltages of the memory cells are verified. For example, when the threshold voltages of all the memory cells reach a predetermined verify level, the application of the write pulses is ended.
Even in the multi-level flash memory, for a purpose of increasing the storage capacity of one memory chip, miniaturization of the memory cell proceeds. With the miniaturization, an interval between the memory cells narrows, and this causes various problems.
Particularly when the interval between the floating gate electrodes of the memory cell narrows, a capacitance among a plurality of floating gate electrodes disposed adjacent to one another increases. As a result, when predetermined data is written in the selected one memory cell, a potential of the floating gate electrode of the non-selected memory cell disposed adjacent to one memory cell changes. This means that the threshold voltage of the non-selected memory cell fluctuates separately from the write operation, and a reliability of the multi-level flash memory drops.
As a technique which can handle this problem, a method of executing the write operation with respect to one memory cell by two write routines (double write method) is known. For example, the above-described step-up method is applied to each routine. This can realize a high-precision threshold value control which is not influenced by the fluctuation of the threshold voltage of the memory cell caused by the increase of the capacitance among the floating gate electrodes.
However, when a so-called double write method is used, write data has to be held somewhere from a start of the first write routine till an end of the second write routine. This is because it is determined whether or not to inject the charge into the floating gate electrode in accordance with the value of the write data.
Therefore, in the multi-level flash memory, a chip size increases for a storage circuit for storing the write data. This also causes the increase of a manufacturing cost.